Nonvolatile memory elements are used in systems in which persistent storage is required. For example, digital cameras use nonvolatile memory cards to store images and digital music players use nonvolatile memory to store audio data. Nonvolatile memory is also used to persistently store data in computer environments.
Nonvolatile memory is often formed using electrically-erasable programmable read only memory (EEPROM) technology. This type of nonvolatile memory contains floating gate transistors that can be selectively programmed or erased by application of suitable voltages to their terminals.
As fabrication techniques improve, it is becoming possible to fabricate nonvolatile memory elements with increasingly smaller dimensions. However, as device dimensions shrink, scaling issues are posing challenges for traditional nonvolatile memory technology. This has led to the investigation of alternative nonvolatile memory technologies, including resistive switching nonvolatile memory known in array form as resistive random access memory or ReRAM.
Resistive switching nonvolatile memory is formed using memory elements that have two or more stable states with different resistances. Bistable memory has two stable states. A bistable memory element can be placed in a high resistance state or a low resistance state by application of suitable voltages or currents. Voltage pulses are typically used to switch the memory element from one resistance state to the other. Nondestructive read operations can be performed to ascertain the value of a data bit that is stored in a memory cell.
Resistive switching based on transition metal oxide switching elements formed of metal oxide layers has been demonstrated. Although metal oxide layers such as these exhibit bistability, the resistance of these layers and/or the ratio of the high-to-low resistance states is (are) often insufficient to be of use within a practical nonvolatile memory device. For instance, the resistance states of the metal oxide layer should preferably be significant as compared to that of the system (e.g., the memory device and associated circuitry) so that any change in the resistance state change is perceptible. Since the variation in the difference in the resistive states is related to the resistance of the resistive switching layer, it is often hard to use a low resistance metal oxide layer to form a reliable nonvolatile memory device. For example, in a nonvolatile memory that has conductive lines formed of a relatively high resistance metal such as tungsten, the resistance of the conductive lines may overwhelm the resistance of the metal oxide resistive switching element if its resistance was not sufficiently high. It may be difficult or impossible to sense the state of the bistable metal oxide resistive switching element.
Similar issues can arise from integration of the resistive switching memory element with current steering elements, such as diodes or transistors. The resistance of the resistive switching memory element (at least in its high resistance state) is preferably significant compared to the resistance of the current steering elements, so that the unvarying resistance of the current steering element does not dominate the resistance of the switching memory element, and thus reduce the measurable difference between the “on” and “off” states of the formed memory device (i.e., logic states of the device). However, since the power that can be delivered to a circuit containing a series of resistive switching memory elements and current steering elements is typically limited in most conventional nonvolatile memory devices (e.g., CMOS driven devices), it is desirable to form each of the resistive switching memory elements and current steering elements in the circuit so that the voltage drop across each of these elements is small, and thus resistance of the series connected elements does not cause the current to decrease to an undesirable level due to the fixed applied voltage (e.g., ˜2-5 V).
As nonvolatile memory device sizes shrink, it is important to reduce the required currents and voltages that are necessary to reliably set, reset and/or determine the desired “on” and “off” states of the device to minimize overall power consumption of the memory chip as well as resistive heating of the device and cross-talk between adjacent devices. Moreover, as nonvolatile memory device sizes shrink it becomes increasing necessary to assure that the “set” and “reset” currents used to change the state of the memory element are not too large so as to require higher voltage transistors for chip control circuitry, as well to minimize damage to or alter the electrical or physical properties of the one or more layers found in the formed memory device. A large current flowing through the current carrying lines in a memory array can also undesirably alter or disturb the memory state of other interconnected devices or possibly damage portions of the adjacently connected devices, due to an appreciable amount of “cross-talk” created between them due to resistive heat transfer. Therefore, there is a need to limit and/or minimize the required current used to sense and program the logic states of each of the interconnected devices in an effort to reduce chip overall power consumption as well as improve device longevity and reduce the chance that cross-talk between adjacently connected devices, which can alter a nonvolatile memory's device state. Therefore, it is desirable to form a nonvolatile memory device that has low programming currents when switching the device between the “on” and “off” states.
The addition of individual current limiting resistors for each memory element can reduce the required programming currents. These current-limiting resistors are typically formed by adding a second layer of a fixed resistive material adjacent to the bistable resistive material forming the memory elements, as is disclosed in co-owned U.S. patent application Ser. No. 13/353,000, entitled “Nonvolatile Memory Device Having A Current Limiting Element” filed on Jan. 18, 2012, which claims priority to U.S. Provisional Patent Application No. 61/513,355 entitled “Nonvolatile Memory Device Having A Current Limiting Element,” filed on Jul. 29, 2011, both of which are incorporated herein by reference. This extra layer requires an additional process step.